? semiconductor components industries, llc, 2005 august, 2005 ? rev. 2 1 publication order number: ntp45n06l/d ntp45n06l, NTB45N06L power mosfet 45 amps, 60 volts logic level, n?channel to?220 and d 2 pak designed for low voltage, high speed switching applications in power supplies, converters and power motor controls and bridge circuits. features ? higher current rating ? lower r ds(on) ? lower v ds(on) ? lower capacitances ? lower total gate charge ? tighter v sd specification ? lower diode reverse recovery time ? lower reverse recovery stored charge ? pb?free packages are available typical applications ? power supplies ? converters ? power motor controls ? bridge circuits 45 amperes, 60 volts r ds(on) = 28 m n?channel d s g see detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. ordering information http://onsemi.com to?220ab case 221a style 5 1 2 3 4 marking diagrams & pin assignments ntx45n06l = device code x = b or p a = assembly location y = year ww = work week g = pb?free package ntx45n06lg ayww 1 gate 3 source 4 drain 2 drain ntx 45n06lg ayww 1 gate 3 sourc e 4 drain 2 drain 1 2 3 4 d 2 pak case 418b style 2
ntp45n06l, NTB45N06L http://onsemi.com 2 maximum ratings (t j = 25 c unless otherwise noted) rating symbol value unit drain?to?source voltage v dss 60 vdc drain?to?gate voltage (r gs = 10 m ) v dgr 60 vdc gate?to?source voltage ? continuous ? non?repetitive (t p 10 ms) v gs v gs 15 20 vdc drain current ? continuous @ t a = 25 c ? continuous @ t a = 100 c ? single pulse (t p 10 s) i d i d i dm 45 30 150 adc apk total power dissipation @ t a = 25 c derate above 25 c total power dissipation @ t a = 25 c (note 1) total power dissipation @ t a = 25 c (note 2) p d 125 0.83 3.2 2.4 w w/ c w w operating and storage temperature range t j , t stg ?55 to +175 c single pulse drain?to?source avalanche energy ? starting t j = 25 c (v dd = 50 vdc, v gs = 5.0 vdc, l = 0.3 mh i l(pk) = 40 a, v ds = 60 vdc, r g = 25 ) e as 240 mj thermal resistance ? junction?to?case ? junction?to?ambient (note 1) ? junction?to?ambient (note 2) r jc r ja r ja 1.2 46.8 63.2 c/w maximum lead temperature for soldering purposes, 1/8 in from case for 10 seconds t l 260 c maximum ratings are those values beyond which device damage can occur. maximum ratings applied to the device are individual str ess limit values (not normal operating conditions) and are not valid simultaneously. if these limits are exceeded, device functional operation i s not implied, damage may occur and reliability may be affected. 1. when surface mounted to an fr4 board using 1 pad size, (cu area 1.127 in 2 ). 2. when surface mounted to an fr4 board using the minimum recommended pad size, (cu area 0.412 in 2 ). ordering information device package shipping ? ntp45n06l to?220 50 units / rail ntp45n06lg to?220 (pb?free) 50 units / rail NTB45N06L d 2 pak 50 units / rail NTB45N06Lg d 2 pak (pb?free) 50 units / rail NTB45N06Lt4 d 2 pak 800 tape & reel NTB45N06Lt4g d 2 pak (pb?free) 800 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntp45n06l, NTB45N06L http://onsemi.com 3 electrical characteristics (t j = 25 c unless otherwise noted) characteristic symbol min typ max unit off characteristics drain?to?source breakdown voltage (note 3) (v gs = 0 vdc, i d = 250 adc) temperature coefficient (positive) v (br)dss 60 ? 67 67.2 ? ? vdc mv/ c zero gate voltage drain current (v ds = 60 vdc, v gs = 0 vdc) (v ds = 60 vdc, v gs = 0 vdc, t j = 150 c) i dss ? ? ? ? 1.0 10 adc gate?body leakage current (v gs = 15 vdc, v ds = 0 vdc) i gss ? ? 100 nadc on characteristics (note 4) gate threshold voltage (note 4) (v ds = v gs , i d = 250 adc) threshold temperature coefficient (negative) v gs(th) 1.0 ? 1.8 4.7 2.0 ? vdc mv/ c static drain?to?source on?resistance (note 4) (v gs = 5.0 vdc, i d = 22.5 adc) r ds(on) ? 23 28 m static drain?to?source on?voltage (note 4) (v gs = 5.0 vdc, i d = 45 adc) (v gs = 5.0 vdc, i d = 22.5 adc, t j = 150 c) v ds(on) ? ? 1.03 0.93 1.51 ? vdc forward transconductance (note 4) (v ds = 8.0 vdc, i d = 12 adc) g fs ? 22.8 ? mhos dynamic characteristics input capacitance (v ds = 25 vdc, v gs = 0 vdc, f = 1.0 mhz) c iss ? 1212 1700 pf output capacitance c oss ? 352 480 transfer capacitance c rss ? 90 180 switching characteristics (note 5) turn?on delay time (v dd = 30 vdc, i d = 45 adc, v gs = 5.0 vdc, r g = 9.1 ) (note 4) t d(on) ? 13 30 ns rise time t r ? 341 680 turn?off delay time t d(off) ? 36 75 fall time t f ? 158 320 gate charge (v ds = 48 vdc, i d = 45 adc, v gs = 5.0 vdc) (note 4) q t ? 23 32 nc q 1 ? 4.6 ? q 2 ? 14.1 ? source?drain diode characteristics forward on?voltage (i s = 45 adc, v gs = 0 vdc) (note 4) (i s = 45 adc, v gs = 0 vdc, t j = 150 c) v sd ? ? 1.01 0.92 1.15 ? vdc reverse recovery time (i s = 45 adc, v gs = 0 vdc, di s /dt = 100 a/ s) (note 4) t rr ? 56 ? ns t a ? 30 ? t b ? 26 ? reverse recovery stored charge q rr ? 0.09 ? c 3. when surface mounted to an fr4 board using the minimum recommended pad size, (cu area 0.412 in 2 ). 4. pulse test: pulse width 300 s, duty cycle 2%. 5. switching characteristics are independent of operating junction temperatures.
ntp45n06l, NTB45N06L http://onsemi.com 4 2 1.8 1.4 1.6 1.2 1 0.6 100 10 1000 10000 0 50 4 20 2 1 v ds , drain?to?source voltage (volts) i d , drain current (amps) 0 v gs , gate?to?source voltage (volts) figure 1. on?region characteristics figure 2. transfer characteristics i d , drain current (amps) 0 0.038 0.034 0.03 40 30 20 0.026 0.022 0.018 0.014 10 50 80 figure 3. on?resistance vs. gate?to?source voltage i d , drain current (amps) figure 4. on?resistance vs. drain current and gate voltage i d , drain current (amps) r ds(on) , drain?to?source resistance ( ) r ds(on) , drain?to?source resistance ( ) figure 5. on?resistance variation with temperature t j , junction temperature ( c) figure 6. drain?to?source leakage current vs. voltage v ds , drain?to?source voltage (volts) r ds(on) , drain?to?source resistance (normalized) i dss , leakage (na) 80 ?50 50 25 0 ?25 75 125 100 1.8 5 4.2 3.4 2.6 5 .8 03040 20 50 10 8 0 04050 30 20 6 0 10 3 10 30 40 v gs = 8 v v gs = 7 v v gs = 6 v v gs = 5.5 v v gs = 5 v v gs = 4 v v gs = 3.5 v v ds > = 10 v t j = 25 c t j = ?55 c t j = 100 c v gs = 10 v v gs = 5 v v gs = 5 v 150 175 v gs = 0 v i d = 22.5 a v gs = 5 v 60 70 50 20 0 80 10 30 40 60 70 0.042 0.046 0.038 0.034 0.03 0.026 0.022 0.018 0.042 0.046 60 70 0.8 v gs = 4.5 v v gs = 9 v v gs = 10 v t j = 25 c t j = ?55 c t j = 100 c 60 70 t j = 150 c t j = 100 c t j = 125 c
ntp45n06l, NTB45N06L http://onsemi.com 5 0 i d = 45 a t j = 25 c v gs q 2 q 1 q t v gs 1000 100 10 1 0.1 1000 100 10 6 5 4 3 2 1 0 280 200 80 40 0 48 40 32 24 0 10 3600 2800 10 2400 2000 15 520 gate?to?source or drain?to?source voltage (volts) c, capacitance (pf) 1600 1200 800 400 0 5 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate?to?source and drain?to?source voltage vs. total charge v gs , gate?to?source voltage (volts ) figure 9. resistive switching time variation vs. gate resistance r g , gate resistance ( ) figure 10. diode forward voltage vs. current v sd , source?to?drain voltage (volts) i s , source current (amps) t, time (ns) figure 11. maximum rated forward biased safe operating area v ds , drain?to?source voltage (volts) figure 12. maximum avalanche energy vs. starting junction temperature t j , starting junction temperature ( c) i d , drain current (amps) e as , single pulse drain?to?source avalanche energy (mj) 25 0 16 20 12 8 42 4 1 10 100 0.6 0.76 0.88 0.72 0.68 0.92 0.64 1 0.10 10 100 1 25 125 150 100 75 17 5 50 v gs = 0 v v ds = 0 v t j = 25 c c rss c iss c oss c rss 16 8 0.8 0.84 c iss v gs = 15 v single pulse t c = 25 c v ds = 30 v i d = 45 a v gs = 5 v v gs = 0 v t j = 25 c i d = 45 a 10 ms 1 ms 100 s dc t r t d(off) t d(on) t f v ds 3200 0.96 120 160 240 r ds(on) limit thermal limit package limit 4000
ntp45n06l, NTB45N06L http://onsemi.com 6 0.00001 1 0.1 0.01 0.001 0.0001 10 1 0.1 0.01 r(t), effective transient thermal response (normalized) t, time (s) figure 13. thermal response normalized to r jc at steady state 10 0.01 0.001 figure 14. thermal response t, time (s) r(t), effective transient thermal resistance (normalized) 0.00001 0.001 0.01 1 0.1 1000 100 10 1 0.1 0.0001 normalized to r ja at steady state, 1 square cu pad, cu area 1.127 in 2 , 3 x 3 inch fr4 board
ntp45n06l, NTB45N06L http://onsemi.com 7 package dimensions d 2 pak case 418b?04 issue j style 2: pin 1. gate 2. drain 3. source 4. drain seating plane s g d ?t? m 0.13 (0.005) t 23 1 4 3 pl k j h v e c a dim min max min max millimeters inches a 0.340 0.380 8.64 9.65 b 0.380 0.405 9.65 10.29 c 0.160 0.190 4.06 4.83 d 0.020 0.035 0.51 0.89 e 0.045 0.055 1.14 1.40 g 0.100 bsc 2.54 bsc h 0.080 0.110 2.03 2.79 j 0.018 0.025 0.46 0.64 k 0.090 0.110 2.29 2.79 s 0.575 0.625 14.60 15.88 v 0.045 0.055 1.14 1.40 ?b? m b w w notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 418b?01 thru 418b?03 obsolete, new standard 418b?04. f 0.310 0.350 7.87 8.89 l 0.052 0.072 1.32 1.83 m 0.280 0.320 7.11 8.13 n 0.197 ref 5.00 ref p 0.079 ref 2.00 ref r 0.039 ref 0.99 ref m l f m l f m l f variable configuration zone r n p u view w?w view w?w view w?w 123 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* 8.38 0.33 1.016 0.04 17.02 0.67 10.66 0.42 3.05 0.12 5.08 0.20 mm inches scale 3:1
ntp45n06l, NTB45N06L http://onsemi.com 8 package dimensions to?220 case 221a?09 issue aa notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension z defines a zone where all body and lead irregularities are allowed. dim min max min max millimeters inches a 0.570 0.620 14.48 15.75 b 0.380 0.405 9.66 10.28 c 0.160 0.190 4.07 4.82 d 0.025 0.035 0.64 0.88 f 0.142 0.147 3.61 3.73 g 0.095 0.105 2.42 2.66 h 0.110 0.155 2.80 3.93 j 0.018 0.025 0.46 0.64 k 0.500 0.562 12.70 14.27 l 0.045 0.060 1.15 1.52 n 0.190 0.210 4.83 5.33 q 0.100 0.120 2.54 3.04 r 0.080 0.110 2.04 2.79 s 0.045 0.055 1.15 1.39 t 0.235 0.255 5.97 6.47 u 0.000 0.050 0.00 1.27 v 0.045 ??? 1.15 ??? z ??? 0.080 ??? 2.04 b q h z l v g n a k f 123 4 d seating plane ?t? c s t u r j style 5: pin 1. gate 2. drain 3. source 4. drain on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800?282?9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2?9?1 kamimeguro, meguro?ku, tokyo, japan 153?0051 phone : 81?3?5773?3850 ntp45n06l/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082?1312 usa phone : 480?829?7710 or 800?344?3860 toll free usa/canada fax : 480?829?7709 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.
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